JPS6312855U - - Google Patents
Info
- Publication number
- JPS6312855U JPS6312855U JP10579986U JP10579986U JPS6312855U JP S6312855 U JPS6312855 U JP S6312855U JP 10579986 U JP10579986 U JP 10579986U JP 10579986 U JP10579986 U JP 10579986U JP S6312855 U JPS6312855 U JP S6312855U
- Authority
- JP
- Japan
- Prior art keywords
- package
- pins
- integrated circuit
- wiring board
- scale integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10579986U JPS6312855U (en]) | 1986-07-10 | 1986-07-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10579986U JPS6312855U (en]) | 1986-07-10 | 1986-07-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6312855U true JPS6312855U (en]) | 1988-01-27 |
Family
ID=30980568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10579986U Pending JPS6312855U (en]) | 1986-07-10 | 1986-07-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6312855U (en]) |
-
1986
- 1986-07-10 JP JP10579986U patent/JPS6312855U/ja active Pending
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